CPU: RISC-V dual-core 64bit, 400MHz adjustable frequency: | Powerful dual-core 64-bit open architecture-based processor with rich community resources |
FPU specification |
Meet the IEEE754-2008 standard |
Debugging support |
High-speed UART and JTAG interface for debugging(only wire bond pads are available) |
Onboard camera DVP carrier |
224pin 0.5mm pitch FPC carrier, AVDD-3.0V; DVDD-1.3 |
Pinout |
In addition to the 4 IOs of the JTAG interface, the rest of the IO is exported to the M.2 interface. |
Neural-Network Processor Unit(NPU) |
- Support for the fixed-point model trained by the mainstream training framework in accordance with specific restriction rules
- There is no direct limit on the number of network layers, which supports separate configuration of each layer of convolutional neural network parameters, including the number of input and output channels, input and output line width and column height.
- Support for two convolution kernels 1x1 and 3x3
- Support for any form of an activation function
- Maximum support for neural network parameters in real-time operation from 5.5MiB to 5.9MiB
- Maximum supported network parameter size when working in non-real time(Flash capacity - software volume)
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Audio processor(APU) |
- Can support up to 8 audio input streams, ie 4 channels of dual-channel
- Can support simultaneous sound source pre-processing and beamforming in up to 16 directions
- Can support a valid voice stream output
- Internal audio signal processing accuracy reaches 16-bit
- Input audio signal supports 12-bit, 16-bit, 24-bit, 32-bit precision
- Support multi-channel raw signal direct output
- Can support audio input up to 192K sample rate
- Built-in FFT transform unit to provide 512-point fast Fourier transform for audio data
- Store output data into SoC s system memory using system DMAC
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Static Random Access Memory(SARM) |
The SARM consists of two parts, 6MiB of on-chip general pur[ose SARM memory and 2MiB of on-chip AI SRAM memory, for a total of 8MiB(1Mib is megabyte). |
Field-Programmable IO Array(FPIOA/IOMUX) |
FIA allows users to map 255 internal functions to 48 free IOs on the periphery of the chip |
Digital Video Interface |
Maximum support 640x480 and below resolution, configurable per frame size |
Fast Fourier transform accelerator |
The FFT accelerator implements FFT operations in hardware. |
FreeRtos amp; Standard SDK |
Support FreeRtos and Standard development kit |
MicroPython Support |
Support MicroPython on M1 |
Machine vision |
Machine vision based on convolutional neural network |
Machine hearing |
The high-performance microphone array processor |
External supply voltage requirement |
5.0V0.2V |
External supply current demand |
gt; 300mA @ 5V |
Temperature rise |
lt; 30K |
Range of working temperature |
-30 °C ~ 85 °C |